Search results for "Memory address"
showing 2 items of 2 documents
Comparison of implementations of the lattice-Boltzmann method
2008
AbstractSimplicity of coding is usually an appealing feature of the lattice-Boltzmann method (LBM). Conventional implementations of LBM are often based on the two-lattice or the two-step algorithm, which however suffer from high memory consumption and poor computational performance, respectively. The aim of this work was to identify implementations of LBM that would achieve high computational performance with low memory consumption. Effects of memory addressing schemes were investigated in particular. Data layouts for velocity distribution values were also considered, and they were found to be related to computational performance. A novel bundle data layout was therefore introduced. Address…
A block access unit for 2D memory access
2007
Many of the coding tools in the H.264/AVC video coding standard are based on 2D processing resulting in rowwise and column-wise memory accesses starting from arbitrary memory addresses. This paper discusses a low-cost hardware realization of these accesses on sub-word parallel processors. The proposed block access unit is placed between the processor and memory. It supports unaligned 2D block accesses according to several 2D access patterns. The 2D block accesses are pipelinable and they result in minimum number of memory accesses required to deliver the desired data.